1) Parallel 3D Finite Element Monte Carlo Device Simulations Of Multigate Transistors
You will continue in the development of a 3D finite element Monte Carlo device simulator in order to investigate and optimise future multigate semiconductor transistors with the complex 3D geometries for the sub-22 nm technology. This 3D simulator can run in parallel utilising the message passing interface (MPI) standard library. You will continue in the incorporating quantum-mechanical corrections to account for a carrier confinement in the channel using a density gradient method.
Then, you will create unstructured meshes that will have mesh points at real atom positions in the crystal lattice of Si body and at the semiconductor-dielectric interface. Later, you extend the simulator by adapting high mobility materials like GaAs and InGaAs which are currently intensively researched for these novel device architectures.
2) Modelling of Metal-Semiconductor Contacts for the Next Generation of Nanoscale Transistors
The aims of this PhD research will be i) to enable and to carry out multiscale modelling of the optimal metal-semiconductor interfaces, such that the Schottky barrier is minimal and ii) to analyse the role of interface defects, strain, and disorder on the carrier transport in nanoscale multi-gate transistors. The research will be closely coordinated within the EPSRC grant "Multiscale Modelling of Metal-Semiconductor Contacts for the Next Generation of Nanoscale Transistors" in collaboration with Dr. Peter Sushko, University College London (UCL) and supported by IBM, TSMC, IMEC, and University of Glasgow. The PhD candidate will closely work with one post-doctoral researcher at Swansea and one post-doctoral researcher at UCL. He will help to bridge ab-initio modelling (DFT) across the metal-semiconductor interfaces using 3D transport Monte Carlo and Non-Equilibrium Green's Functions device simulations based on finite element mesh with atomistic resolution. The research in at forefront of the advanced modelling of access regions for a future 3D FinFET 22nm CMOS technology.
You should have an interest in physics, engineering, or computer science, with a particular interest in either atomistic scale semiconductor devices, or atomic scale material modelling, or high-performance computing, or computational modelling.
3) Novel GaN HEMT Switches for Power Management: Device Design, Optimization and Reliability Issues
Silicon based power devices’ technology is reaching its maturity and is not able to deliver a further significant improvement in power conversion. An essential technology booster is needed to satisfy the requirements for a high integration and a large power conversion in future electric and hybrid cars. The power switches allowing very high current and operating at large temperature are vital to keep control systems simple and efficient in a competitive electric car. The replacement by wide-bandgap III-Nitrides already demonstrating significant leaps in the performance of power devices is inevitable.
Aims and Objectives of the PhD Project are 1) to gain experimental data (I-V characteristics, C-V characteristics, breakdown voltage, pulse transient measurements) on a novel AlGaN/GaN HEMT technology by collaborating with Dr E. Wasige, School of Engineering, Glasgow University; 2) to investigate and optimise the device reliability focusing on the current collapse and the device degradation phenomena by comparing experimental measurements; and 3) to streamline device design, in order to achieve a large on-current density and a low off-current in the device, and to minimise the device degradation.