Faculty Personal Web-Page.
Pioneered introduction of III-V MOSFETs for digital applications.
Developed parallel 3D finite element Schrödinger Equation quantum corrected drift-diffusion and Monte Carlo simulation toolboxes. Predicting a performance of nanoscale multi-gate transistors for future technology nodes (sub-10 nm technology nodes).
Simulating nanoscale transistor variability induced by materials and fabrication process using the 3D Monte Carlo and drift-diffusion toolboxes.
Coordinated simulation activities in the project "III-V MOSFETs for Ultimate CMOS" and in EU FP7 No. 1 STREP grant DUALLOGIC investigating nanoscale III-V MOSFETs.
More than 250 publications including 103 papers in journals like Nano Letters, IEEE T-ED, IEEE TNano, IEEE EDL, IEEE Access, IEEE J-EDS, and IEEE Microwave Theory Tech.; J. Appl. Phys.; Appl. Phys. Lett.; Phys. Rev. B and E; ACS Appl. Mater. & Interfaces, and Semicond. Sci. Technol, 20 invited talks.
Served in the programme committee of IEEE Nano 2009, 2011 ULIS 2010, IWCE 2015 and EDISON 2015 conferences, Programme Chair of IWCN 2017.
Jointly leading Nanoelectronic Devices Computational Group (NanoDeCo).