Publications Archive

Ahmeda, K., Ubochi, B., Alqaysi, M., Al-Khalidi, A., Wasige, E., & Kalna, K. (2020). The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation. Microelectronics Reliability, 115, 113965 https://doi.org/10.1016/j.microrel.2020.113965, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa55553
Mohamed, A., Ghazali, N., Chong, H., Cobley, R., Li, L., & Kalna, K. (2020). Channel Mobility and Contact Resistance in Scaled ZnO Thin-Film Transistors. Solid-State Electronics, 172, 107867 https://doi.org/10.1016/j.sse.2020.107867, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa54909
Forster, S., Chaussende, D., & Kalna, K. (2020). SiC/Al4SiC4-Based Heterostructure Transistors. ACS Applied Electronic Materials, 2(9), 3001-3007. https://doi.org/10.1021/acsaelm.0c00614, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa55561 https://pubs.acs.org/doi/abs/10.1021/acsaelm.0c00614
Islam, A., Aynul, A., & Kalna, K. (2020). Analysis of Potential and Electron Density Behaviour in Extremely Scaled Si and InGaAs MOSFETs Applying Monte Carlo Simulations. Journal of Physics: Conference Series, 1637, 012007 https://doi.org/10.1088/1742-6596/1637/1/012007, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa55818
Duffy, S., Benbakhti, B., Zhang, W., Ahmeda, K., Kalna, K., Boucherta, M., Mattalah, M., Chahdi, H., Bourzgui, N., & Soltani, A. (2020). A Parametric Technique for Trap Characterization in AlGaN/GaN HEMTs. IEEE Transactions on Electron Devices, 67(5), 1924-1930. https://doi.org/10.1109/ted.2020.2980329, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa54035
Nagy, D., Espineira, G., Indalecio, G., Garcia-Loureiro, A., Kalna, K., & Seoane, N. (2020). Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes. IEEE Access, 8, 53196-53202. https://doi.org/10.1109/access.2020.2980925, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa53939
Seoane, N., Nagy, D., Indalecio, G., Espiñeira, G., Kalna, K., & García-Loureiro, A. (2019). A Multi-Method Simulation Toolbox to Study Performance and Variability of Nanowire FETs. Materials, 12(15), 2391 https://doi.org/10.3390/ma12152391, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa51467
Islam, A., Kalna, K., & Kalna, K. (2019). Analysis of electron transport in the nano-scaled Si, SOI and III-V MOSFETs: Si/SiO2 interface charges and quantum mechanical effects. IOP Conference Series: Materials Science and Engineering, 504, 012021 https://doi.org/10.1088/1757-899X/504/1/012021, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa50487
Espineira, G., Nagy, D., Indalecio, G., Garcia-Loureiro, A., Kalna, K., Seoane, N., & Kalna, K. (2019). Impact of Gate Edge Roughness Variability on FinFET and Gate-All-Around Nanowire FET. IEEE Electron Device Letters, 40(4), 510-513. https://doi.org/10.1109/LED.2019.2900494, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa50182
Alqaysi, M., Martinez, A., Ahmeda, K., Ubochi, B., Kalna, K., & Martinez Muniz, A. (2019). Impact of interface traps/defects and self-heating on the degradation of performance of a 4H-SiC VDMOSFET. IET Power Electronics, 12(11), 2731-2740. https://doi.org/10.1049/iet-pel.2018.5897, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa52363
Adenekan, O., Holland, P., & Kalna, K. (2019). Scaling and optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub–50 V applications. Microelectronics Reliability, 99, 213-221. https://doi.org/10.1016/j.microrel.2019.04.008, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa50951
Forster, S., Chaussende, D., & Kalna, K. (2019). Monte Carlo Simulations of Electron Transport Characteristics of Ternary Carbide Al4SiC4. ACS Applied Energy Materials, 2(1), 715-720. https://doi.org/10.1021/acsaem.8b01767, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa50391
Nagy, D., Indalecio, G., Garcia-Loureiro, A., Espineira, G., Elmessary, M., Kalna, K., & Seoane, N. (2019). Drift-Diffusion Versus Monte Carlo Simulated ON-Current Variability in Nanowire FETs. IEEE Access, 7, 12790-12797. https://doi.org/10.1109/access.2019.2892592, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa48909
Indalecio, G., Garcia-Loureiro, A., Elmessary, M., Kalna, K., & Seoane, N. (2018). Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations. IEEE Journal of the Electron Devices Society, 1-1. https://doi.org/10.1109/JEDS.2018.2828504, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa39889
Mohamed, A., Oxland, R., Aldegunde, M., Hepplestone, S., Sushko, P., Kalna, K., & Kalna, K. (2018). Narrowing of band gap at source/drain contact scheme of nanoscale InAs–nMOS. Solid-State Electronics https://doi.org/10.1016/j.sse.2018.01.006, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa38406
Seoane, N., Indalecio, G., Nagy, D., Kalna, K., & Garcia-Loureiro, A. (2018). Impact of Cross-Sectional Shape on 10-nm Gate Length InGaAs FinFET Performance and Variability. IEEE Transactions on Electron Devices, 65(2), 456-462. https://doi.org/10.1109/TED.2017.2785325, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa38327
Adenekan, O., Holland, P., & Kalna, K. (2018). Optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub-100 V applications. Microelectronics Journal, 81, 94-100.
https://doi.org/10.1016/j.mejo.2018.09.007, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa44949
Duffy, S., Benbakhti, B., Kalna, K., Boucherta, M., Zhang, W., Bourzgui, N., & Soltani, A. (2018). Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs. IEEE Access, 6, 42721-42728.
https://doi.org/10.1109/ACCESS.2018.2861323, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa44608
Duffy, S., Benbakhti, B., Kalna, K., Boucherta, M., Zhang, W., Bourzgui, N., & Soltani, A. (2018). Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs. IEEE Access, 6, 42721-42728.
https://doi.org/10.1109/access.2018.2861323, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa43367
Nagy, D., Indalecio, G., Garcia-Loureiro, A., Elmessary, M., Kalna, K., & Seoane, N. (2018). FinFET Versus Gate-All-Around Nanowire FET: Performance, Scaling, and Variability. IEEE Journal of the Electron Devices Society, 6, 332-340.
https://doi.org/10.1109/JEDS.2018.2804383, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa38852
Ahmeda, K., Ubochi, B., Benbakhti, B., Duffy, S., Soltani, A., Zhang, W., & Kalna, K. (2017). Role of Self-Heating and Polarization in AlGaN/GaN Based Heterostructures. IEEE Access, 5(October), 20946-20952.
https://doi.org/10.1109/ACCESS.2017.2755984, SU Repository: https://cronfa.swan.ac.uk/Record/cronfa36147

https://ieeexplore.ieee.org/document/8055440
B. Ubochi, K. Ahmeda, S. Faramehr, P. Igić, A. Al-Khalidi, E. Wasige, and K. Kalna, Operational Frequency Degradation Induced Trapping in Scaled GaN HEMTs, accepted to Microelectron. Reliab.(2017).
G. Indalecio, N. Seoane, K. Kalna and A. J. García-Loureiro, Fluctuation Sensitivity Map: A Novel Technique to Characterise and Predict Device Behaviour Under Metal Grain Work-Function Variability Effects, accepted to IEEE Trans. Electron Devices (2017).
M. A. Elmessary, D. Nagy, M. Aldegunde, Natalia Seoane, G. Indalecio, J. Lindberg, W. Dettmer, D. Perić, A. J. García-Loureiro, K. Kalna, Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations, Solid-State Electron. 128 (2017) 17-24.
Olga Kryvchenkova, I. Abdullah, J. Macdonald, M. Elliott, T. Anthopoulos, Y.-H. Lin, P. Igić, K. Kalna, and R. J. Cobley, A non-destructive method for mapping metal contact diffusion in In₂O₃ thin-film transistors, ACS Appl. Mater. & Interfaces 8, No. 38, (2016) 25631-25636.
B. Benbakhti, K. H. Chan, A. Soltani and K. Kalna, Device and Circuit Performance of the Future Hybrid III-V and Ge based CMOS Technology, IEEE Trans. Electron Devices 63, No. 10, Oct. (2016) 3893 - 3899.
Natalia Seoane, M. Aldegunde, D. Nagy, M. A. Elmessary, G. Indalecio, A. J. García-Loureiro and K. Kalna, Simulation Study of Scaled In_0.53Ga_0.47As and Si FinFETs for Sub-16 nm Technology Nodes, Semicond. Sci. Technol. 31, No. 7, (2016) 075005 (6pp).
G. Indalecio, A. J. García-Loureiro, N. Seoane and K. Kalna, Study of Metal-Gate Work-Function Variation using Voronoi cells: Comparison of Rayleigh and Gamma distributions, IEEE Trans. Electron Devices 63, No. 6, June (2016) 2625-2628.
M. A. Elmessary, D. Nagy, M. Aldegunde, J. Lindberg, W. G. Dettmer, D. Periç, A. J. García-Loureiro, and K. Kalna, Anisotropic Quantum Corrections for 3D Finite Element Monte Carlo Simulations of Nanoscale Multigate Transistors, IEEE Trans. Electron Devices 63, No. 3, March (2016) 933-939.
N. Seoane, G. Indalecio, M. Aldegunde, D. Nagy, M. A. Elmessary, A. J. García-Loureiro and K. Kalna, Comparison of Fin Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs, IEEE Trans. Electron Devices 63, No. 3, March (2016) 1209-1216.
A. M. Lord, T. G. Maffeis, O. Kryvchenkova, R. J. Cobley, K. Kalna., D. M. Kepaptsoglou, Q. M. Ramasse, A. S. Walton, M. B. Ward, J. Köble and S. P. Wilks, Controlling the Electrical Transport Properties of Nanocontacts to Nanowires, Nano Lett. 15, 4248-4254 (2015).
C. J. Barnett, O. Kryvchenkova, L. S. J. Wilson, T. G. G. Maffeis, K. Kalna, and R. J. Cobley, The role of probe oxide in local surface conductivity measurements, J. Appl. Phys. 117, No. 17, May (2015) 174306 (7pp).
G. Indalecio, N. Seoane, M. Aldegunde, K. Kalna, and A. J. García-Loureiro, Variability Characterisation of Nanoscale Si and InGaAs Fin Field-Effect-Transistors at Subthreshold, J. Low Power Electron. 11, No. 2, 1-7 (2015).
M. Aldegunde and K. Kalna, Energy conserving, self-force free Monte Carlo simulations of semiconductor devices on unstructured meshes, Comput. Phys. Commun. 189, Apr. (2015) 31-36.
D. Nagy, M. A. Elmessary, M. Aldegunde, R. Valin, A. Martinez, J. Lindberg, W. G. Dettmer, D. Periç A. J. García-Loureiro, and K. Kalna, 3D Finite Element Monte Carlo Simulations of Scaled Si SOI FinFET with Different Cross-Sections, IEEE Trans. Nanotechnol. 14, No. 1, Jan. (2015) 93-100.
M. Aldegunde and K. Kalna, Energy conserving, self-force free Monte Carlo simulations of semiconductor devices on unstructured meshes, accepted to Comput. Phys. Commun. (2015).
S. Faramehr, K. Kalna and P. Igiç, Design and simulation of a novel 1400V–4000V enhancement mode buried gate GaN HEMT for power applications, Semicond. Sci. Technol. 29, No. 11, Nov. (2014) 115020 (7pp).
M. Aldegunde, S. Hepplestone, P. Sushko, and K. Kalna, Multi-scale simulations of a Mo/n⁺-GaAs Schottky contact for nano-scale III-V MOSFETs, invited for Semicond. Sci. Technol. 29 (2014).
G. Indalecio, M. Aldegunde, N. Seoane, K. Kalna and A. J. García-Loureiro, Statistical study of the influence of LER and MGG in SOI MOSFET, Semicond. Sci. Technol. 29, No. 4, Apr. (2014) 045005 (7pp).
O. Kryvchenkova, R. J. Cobley, and K. Kalna, Self-consistent modelling of tunnelling spectroscopy on III-V semiconductors, accepted to Appl. Surf. Sci. 295, March (2014) 173–179.
S. Faramehr, K. Kalna and P. Igiç, Drift-diffusion and hydrodynamic modelling of current collapse in GaN HEMTs for RF power application, Semicond. Sci. Technol. 29, No. 2, Feb. (2014) 025007 (11pp).
N. Seoane, G. Indalecio, E. Comesaña, M. Aldegunde, A. J. García-Loureiro and K. Kalna, Random dopant, line-edge roughness and gate workfunction variability in a Nano InGaAs FinFET, IEEE Trans. Electron Devices 61, No. 2, Feb. (2014) 466-472.
J. Lindberg, M. Aldegunde, D. Nagy, W. G. Dettmer, K. Kalna, A. J. García-Loureiro, and D. Periç, Quantum corrections based on the 2-D Schrödinger equation for 3-D Finite Element Monte Carlo simulations of nanoscaled FinFETs, IEEE Trans. Electron Devices 61, No. 2, Feb. (2014) 423-429.
M. Aldegunde, J. García-Loureiro, and K. Kalna, 3D Finite Element Monte Carlo Simulations of Multi-Gate Nanoscale Transistors, IEEE Trans. Electron Devices 60, No. 5, May (2013) 1561-1567.
N. Seoane, G. Indalecio, E. Comesaña, A. J. García-Loureiro, M. Aldegunde and K. Kalna, 3D Simulations of random dopant and metal gate workfunction variability in an In_0.53Ga_0.47As GAA MOSFET, IEEE Electron Device Lett. 34, No. 2, Feb. (2013) 205-207.
B. Benbakhti, A. Martinez, K. Kalna, G. Hellings, G. Eneman, K. De Meyer and M. Meuris, Simulation study of performance for a 20 nm gate length In0.53Ga0.47As Implant Free Quantum Well MOSFET, IEEE Trans. Nanotechnol. 11, 808-817 (2012)
A. Islam, B. Benbakhti, and K. Kalna, Monte Carlo study of ultimate channel scaling in Si and In_0.3Ga_0.7As bulk MOSFETs , IEEE Trans. Nanotechnol. 10, 1424-1432 (2011)
K. Kalna, N. Seoane, A. J. García-Loureiro, I. G. Thayne, and A. Asenov, Benchmarking of scaled InGaAs implant-free nanoMOSFETs, IEEE Trans. Electron Devices 55, 2297-2306 (2008)
M. Aldegunde, N. Seoane, and A. J. García-Loureiro, P. V. Sushko, A. L. Shluger, J. L. Gavartin, K. Kalna and A. Asenov, Atomistic mesh generation for the simulation of nanoscale metal-oxide-semiconductor field-effect transistors, Phys. Rev. E 77, 056702, 9 pages (2008)
B. Benbakhti, A. Soltani, K. Kalna, M. Rousseau, and J.-C. De Jaeger, Effects of self-heating on performance degradation in AlGaN/GaN-based devices, IEEE Trans. Electron Devices 56, 2178-2185 (2009)
A. Martinez, K. Kalna, P. V. Sushko, A. L. Shluger, J. R. Barker, and A. Asenov, Impact of body-thickness-dependent bandstructure on scaling of Double Gate MOSFETs: a DFT/NEGF study, IEEE Trans. Nanotechnol. 8, 159-166 (2009)