Professor
Engineering
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Room: Academic Office - B202
Second Floor
Engineering East
Bay Campus

Pioneered introduction of III-V MOSFETs for digital applications.

Developed parallel 3D finite element drift-diffusion and Monte Carlo simulation toolboxes.

Simulating nanoscale transistor variability induced by materials and fabrication process using 3D Monte Carlo and drift-diffusion toolboxes.


Coordinated simulation activities in the project "III-V MOSFETs for Ultimate CMOS" investigating nano-scaled III-V MOSFETs and in EU FP7 No. 1 STREP grant DUALLOGIC.

More than 200 publications including 81 papers in journals like Nano Letters, IEEE Trans. Electron Devices, Nanotechnol., Electron Device Lett., and Microwave Theory Tech.; J. Appl. Phys.; Appl. Phys. Lett.; Phys. Rev. B and E;  ACS Appl. Mater. & Interfaces, and Semicond. Sci. Technol, 19 invited talks.

Served in programme committee of IEEE Nano 2009, 2011 ULIS 2010, IWCE 2015 and EDISON 2015 conferences, Programme Chair of IWCN 2017.

Jointly Leading Nanoelectronic Devices Computational Group.

Areas of Expertise

  • Simulation and modelling of semiconductor devices

Publications

  1. & Scaling and optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub–50 V applications. Microelectronics Reliability 99, 213-221.
  2. & Analysis of electron transport in the nano-scaled Si, SOI and III-V MOSFETs: Si/SiO2 interface charges and quantum mechanical effects. IOP Conference Series: Materials Science and Engineering 504, 012021
  3. & Monte Carlo Simulations of Electron Transport Characteristics of Ternary Carbide Al4SiC4. ACS Applied Energy Materials 2(1), 715-720.
  4. & Impact of Gate Edge Roughness Variability on FinFET and Gate-All-Around Nanowire FET. IEEE Electron Device Letters 40(4), 510-513.
  5. & Drift-Diffusion Versus Monte Carlo Simulated ON-Current Variability in Nanowire FETs. IEEE Access 7, 12790-12797.
  6. & Optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub-100 V applications. Microelectronics Journal 81, 94-100.
  7. & Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs. IEEE Access 6, 42721-42728.
  8. Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs. IEEE Access 6
  9. & Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations. IEEE Journal of the Electron Devices Society, 1-1.
  10. & FinFET Versus Gate-All-Around Nanowire FET: Performance, Scaling, and Variability. IEEE Journal of the Electron Devices Society 6

See more...

Teaching

  • EG-355 Quantum Devices

    To introduce and develop the design parameters and to evaluate a performance of state-of-the-art semiconductor devices based on quantum confinement and to consider methods to characterise the device properties.

  • EGA211 Semiconductor Technology

    The module introduces semiconductor fundamentals, semiconductor processing, device fabrication technology and device characterization.

Supervision

  • A DFT/NEGF Study on Electron Transport in DNA and Nanowire Field Effect Transistors (current)

    Student name:
    PhD
    Other supervisor: Dr Antonio Martinez Muniz
  • Modelling and Characterisation of a 4H-SiC vertical DMOSFET (current)

    Student name:
    PhD
    Other supervisor: Dr Antonio Martinez Muniz
  • Wide Bandgap Material Discovery (current)

    Student name:
    PhD
    Other supervisor: Dr Antonio Martinez Muniz
  • 'Monte Carlo Simulations of Spin Transport in Semiconductor Devices.' (awarded 2019)

    Student name:
    PhD
    Other supervisor: Dr Sophie Shermer
  • Design and Scaling of Lateral Super-Junction Multi-Gate MOSFET by 3-D TCAD Simulations (awarded 2019)

    Student name:
    PhD
    Other supervisor: Dr Paul Holland
  • Interfaces and Junctions in Nanoscale ZnO and InAs transistors structures (awarded 2019)

    Student name:
    PhD
    Other supervisor: Dr Richard Cobley
  • Design and Implementation of Maximum Power Point Tracking Techniques with Emulated PV Source Based Photovoltaic System (awarded 2019)

    Student name:
    PhD
    Other supervisor: Dr Petar Igic
    Other supervisor: Dr Zhongfu Zhou
  • Reliability of novel GaN HEMT switches for energy management (awarded 2019)

    Student name:
    PhD
    Other supervisor: Prof Lijie Li
  • Dynamic Characterisation and Modelling of RF GaN HEMTs (awarded 2018)

    Student name:
    PhD
    Other supervisor: Dr Antonio Martinez Muniz
  • ''''Non-Equilibrium Green''''s Function simulations of phonon scattering and self-heating in III-V Nanowire field effect transistors'''' (awarded 2017)

    Student name:
    PhD
    Other supervisor: Dr Antonio Martinez Muniz

Career History

Start Date End Date Position Held Location
2013 Present Associated Professor College of Engineering, Swansea University
2010 2012 Senior Lecturer, EPSRC Advanced Research Fellow College of Engineering, Swansea University
2007 2010 EPSRC Advanced Research Fellow Department of Electronics and Electrical Engineering, University of Glasgow
1999 2007 Research Assistant Department of Electronics and Electrical Engineering, University of Glasgow
1994 1999 Research Scientist Institute of Electrical Engineering, Bratislava, Slovakia
1991 1998 PhD in Condensed Matter Physics Comenius University, Bratislava, Slovakia
1985 1990 MSc in Solid State Physics Comenius University, Bratislava, Czechoslovakia

Administrative Responsibilities

  • Member - Nanoelectronic Devices Computational Group

    0 - Present

  • Deputy Director, EEE Board of Studies - Swansea University

    0 - Present

Key Grants and Projects

  • Principal Investigator (FP7 Programme) 2013 - 2015

    Marie-Curie Fellowship: 3D modelling of the performance and variability of high electron mobility transistors for future digital applications (PERSEUS), £200k

  • Principal Investigator (EPSRC Standard Research) 2011 - 2014

    Multiscale Modelling of Metal-Semiconductor Contacts for the Next Generation of Nanoscale Transistors, £352k

  • Principal Investigator (EPSRC Advanced Research Fellowship) 2007 - 2012

    Modelling of Carrier Transport in Ultra Thin Body Transistors, £0.6M

  • Principal Investigator (Royal Society International Joint Project) 2012

    Finite Element 3D Monte Carlo Device Simulator for Multigate Transistors

  • EPSRC 0

    Multiscale modelling of metal-semiconductor contacts for the next generation of nanoscale transistor, £290K

  • EPSRC 0

    Advanced Research Fellowship Modelling of Carrier Transport in Ultra Thin Body Transistors, £525k

  • Royal Society International Joint Project 2010 - 2012

    Finite Element 3D Monte Carlo Device Simulator for Multigate Transistors, £12k

  • NRN grant on RF GaN HEMTs 2014 - 2017

    , with with Cardiff University, £59k

  • EPSRC grant 2007 - 2010

    “III-V MOSFETs for Ultimate CMOS” as a CoI, £ 4.0M

  • FP7 STREP grant DUALLOGIC with IBM 2007 - 2011

    STMicroelectronics, Aixtron, IMEC, LETI, NCSR-D, with University of Leuven, € 9.1M